Technical Field
The present invention belongs to the field of electrode arrays and/or conductive paths or circuits in general. In particular, the present invention relates to a method for conveniently passivating and/or encapsulating electrode arrays or conductive paths in general, as well as to a method for producing and/or fabricating electrode arrays and/or conductive paths in general. Still in more detail, the present invention relates to a method for conveniently passivating stretchable electrode arrays, as well as to a method for producing and/or fabricating stretchable electrode arrays. According to the present invention there is further provided a method for producing a conductive material suitable for manufacturing electrode arrays or conductive paths in general, in particular for manufacturing stretchable electrode arrays, along with a conductive material produced according to the method and an electrode array or conductive path produced by using said conductive material. Still according to the present invention the conductive material is used for filling through vias in passivated conductive paths and/or electrode arrays.
Description of the Related Art
Electrode arrays and, in more general terms, conductive paths, require an insulation layer that covers the conductors so as to protect them from the environment in which they are used. The reason for that relates for example to the fact that, for some applications, the conductor arrays are immersed in a corrosive environment; a further reason, however, relates to the fact that the conductive paths have to be isolated from the environment and/or from each other, in order to prevent electrical interferences, crosstalk, short circuits or the like.
However, at least portions of the conductive paths and/or tracks have to be left uncovered or exposed for allowing the conductive paths to be electrically contacted; in general terms, said portions of the conductive paths define the contact pads and are usually located at the end of corresponding conductive paths; however, the openings may be formed anywhere along the conductive lines or paths, meaning that any portions of the conductive lines or paths may be used as corresponding contacting pads, according to the needs and/or circumstances.
There may even be one or several openings per line as well.
Accordingly, a need exists to passivate and/or insulate conductive paths, wherein portions of said conductive paths (the contact pads) are still exposed and therefore adapted to be electrically contacted.
Several passivation and/or encapsulation methods or processes have been proposed in the past in an attempt to face the need identified above.
For instance, according to the most common methods, an insulation layer is formed (for instance spin coated, laminated, deposited by chemical vapor deposition or the like) on an electrode array provided on a substrate, for instance a silicon wafer.
However, according to the known methods, a continuous film is formed; that means that, even if the thickness of the film (encapsulation layer) is arbitrary and may be selected according to the needs and/or circumstances, through vias have to be formed in the passivation layer or film for the purpose of exposing the active electrode sites (contact portions or pads) so as to allow same to be electrically contacted.
Still according to the prior art methods, said through vias are formed by means of complex lithography and/or etching steps.
However, even if said lithography and/or etching methods have revealed to be quite convenient for several reasons, (very small and/or precise vias may be open with a predefined shape and at predefined positions), said methods are still affected by several drawbacks and/or disadvantages.
One of said drawbacks relates in particular to the costs arising and to the complexity of the machinery and equipment needed for carrying out the above methods.
Moreover, a further drawback relates to the fact that organic solvents or even very aggressive physical or chemical etchants have to be used, which however can lead to damages of the conductors underneath or even, in the worst cases, to the partial or even complete removal of said conductors. Moreover, the chemicals etchants may also damage the carrier substrate or be absorbed by the substrate material (especially if it is a polymer).
In particular, avoiding the risk of damaging the conductors and/or substrate underneath represents an important challenge in the field of fabrication of elastic or stretchable electrode array, wherein the substrate is an elastomer and the thickness of the conductors or conductive paths amounts to a few, typically 1 to 100 nm.
Stretchable arrays (for instance stretchable gold microelectrode arrays, MEAs) are becoming more and more popular and find convenient applications in the field of wearable electrodes, and/or implantable neuroprosthetic interface applications, and/or as electrode arrays for cell culture and tissue slice culture, and/or even for sensing robotic skins or the like; in fact, the most important characteristic or feature of stretchtable microelectrode arrays (for instance MEAs), relates to the fact that same can withstand mechanical deformations such as flexing, stretching, torsion or the like, without electrical failure or loss of their electrical features (in particular electrical conductivity and impedance). Accordingly, microelectrode arrays (for instance MEAs) are particularly suitable to be used as a neural interface with the spinal cord, brain or peripheral nerves or soft biological tissue, for instance for the purpose of stimulating and/or recording neurological or cardiac activity (both in vitro and in vivo), as well as for monitoring hippocampal electrical activity after traumatic brain injury or bladder afferent activity, or even for stimulating electrical potential of excitable cells or the like.
It has in fact been verified that the impedance of microelectrode arrays stay low and stable during the deformation and even after repeated torsions, and therefore facilitate the recording of small amplitude biological signals and ensure efficient functional electrical stimulation. In particular, in both cases of in vitro and in vivo applications, SMEA did not show any degradation of the implant electrical interface, even after several months from implantation.
Microelectrode arrays are usually fabricated by thermally evaporating a metal (gold—Au) thin film on a soft PDMS (polydimethylsiloxane silicone substrate, 120 μm thick) using a polyimide shadow mask. The PDMS layer is cured at 80° C. for at least 12 hours. The resulting electrodes may be 50 μm wide, and mm to cm long, for instance. The connector pads may have an area of 1 mm2 or smaller to allow for easier hand wiring later in the process. The metallization stack is composed of Ti/Au/Ti layers that are 5/30/3 nm thick, respectively, with the Ti layers used to improve adhesion.
It appears therefore clearly from the above that encapsulating the electrodes (whilst leaving the connector pads exposed) represents a difficult task due to the mandatory need of avoiding any risk of damaging the electrodes and/or connector pads.